agentee: electronics design for agents
Schematics, PCB layouts and simulations as plain TOML an agent can write and check. KiCad library import, impedance and current aware net classes, GPU FDTD sims, a CLI and an MCP server.
agentee is an electronics design tool built for agents. The design is plain TOML that an agent writes and edits: the board spec with its stackup and fab rules, symbols, footprints, schematics, layouts and simulations. agentee checks it, works out what the stackup gives you, and draws it. The window is where a person watches, and on a layout they can move parts, route tracks and place vias by hand, saved back into the same TOML.
An agent never has to hand-write the files. agentee edit changes a design in place with commands, keeping comments and layout, and prints the check report for what it touched. Parts come from the KiCad libraries through a built-in importer, so drawing one by hand is rare. The same tools are served over MCP.
Both solvers run on the GPU through wgpu. The 2D field solver handles trace cross-sections and lands within 0.5% of Cohn's exact stripline. The 3D FDTD runs on a layout with lumped ports over whole pads and writes S-parameters as JSON and Touchstone; on a 50 ohm microstrip its phase velocity is within 1.2% of Kirschning-Jansen.
Plain text design
Board specs, symbols, footprints, schematics, layouts and sims as TOML files that diff and review like code.
Checks
Stackup, impedance per net class and layer, IPC-2221 current, fab minimums, pin to pad mapping, connectivity and clearance.
Fab presets
Every JLCPCB impedance stackup from 4 to 20 layers and the PCBWay standard builds.
Simulation
GPU field solve for trace impedance and 3D FDTD of a layout to S-parameters.
Agent tooling
An edit CLI that keeps files tidy, an MCP server with render and sim tools, and a skill that teaches the workflow.
Output
PNG renders, a live viewer with 3D, zone fill, and STEP export of the board for case design.